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dc.contributor.authorOu, SHen_US
dc.contributor.authorLin, TJen_US
dc.contributor.authorLin, HYen_US
dc.contributor.authorChao, CMen_US
dc.contributor.authorLiu, CWen_US
dc.contributor.authorJen, CWen_US
dc.date.accessioned2014-12-08T15:25:38Z-
dc.date.available2014-12-08T15:25:38Z-
dc.date.issued2005en_US
dc.identifier.isbn0-7803-9060-1en_US
dc.identifier.urihttp://hdl.handle.net/11536/18048-
dc.description.abstractThis paper presents a lightweight arithmetic for embedded signal processing, whose hardware complexity is similar to that of the integer one. In our simulations, its 16-bit version has 40.18dB signal to round-off error ratio over the IEEE single-precision floating-point arithmetic, which even out-performs the hand-optimized 32-bit code with integer arithmetic.en_US
dc.language.isoen_USen_US
dc.titleLightweight arithmetic units for VLSI digital signal processorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT), Proceedings of Technical Papersen_US
dc.citation.spage333en_US
dc.citation.epage336en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000233985300086-
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