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dc.contributor.authorWu, WHen_US
dc.contributor.authorChen, MCen_US
dc.contributor.authorWang, MFen_US
dc.contributor.authorHou, THen_US
dc.contributor.authorYao, LGen_US
dc.contributor.authorJin, Yen_US
dc.contributor.authorChen, SCen_US
dc.contributor.authorLiang, MSen_US
dc.date.accessioned2014-12-08T15:25:43Z-
dc.date.available2014-12-08T15:25:43Z-
dc.date.issued2004en_US
dc.identifier.isbn0-7803-8454-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/18131-
dc.description.abstractElectrical characteristics of HfSiO/SiO2 high-k gate stacks have been extensively explored with regard to the effects of base oxide. The flatband voltage shift in N/PMOS capacitors is independent of base oxide thickness, and the dielectric breakdown of the gate stacks is determined by base oxide. In addition, base oxide thickness has a great impact on device performance and charge trapping, presumably due to remote Coulomb scattering (RCS) in the HfSiO bulk layer and direct tunneling through the base oxide. Threshold voltage instability induced by charge trapping will be a major reliability concern for Hf-based high-k gate dielectrics in the future.en_US
dc.language.isoen_USen_US
dc.titleEffects of base oxide in HfSiO/SiO2 high-k gate stacksen_US
dc.typeProceedings Paperen_US
dc.identifier.journalIPFA 2004: PROCEEDINGS OF THE 11TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITSen_US
dc.citation.spage25en_US
dc.citation.epage28en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000224428800008-
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