標題: | A Sigma-Delta modulation based analog BIST system with a wide bandwidth fifth-order analog response extractor for diagnosis purpose |
作者: | Hong, HC Wu, CW Cheng, KT 電控工程研究所 Institute of Electrical and Control Engineering |
公開日期: | 2004 |
摘要: | A wide bandwidth Sigma-Delta modulation based analog built-in self-test (BIST) system that can diagnose the prototype is presented. It consists of a low-cost design-for-testability (DfT) switched-capacitor filter as the circuit under test (CUT) and a wide bandwidth analog response extractor (ARE) to digitize the analog responses for final DSP analysis. The first stage of the DfT CUT is reconfigured to accept a repetitive Sigma-Delta modulated bit-steam as its stimulus. This DfT technique reuses every original component and thus provides the advantages of lowering the testing cost, increasing the fault coverage as well as the accuracy, and being able to perform the at-speed tests. The ARE is a cascaded 2-1-1-1 fifth-order Sigma-Delta modulator equipped with single-bit quantizers to extend the testing bandwidth while retaining moderate tolerance of circuit imperfections. Our measurement results show that this ARE is able to provide a -95 dB spurious free dynamic range over 1 MHz bandwidth when operates at 30 MHz. A multi-tone test is performed to manifest the wide bandwidth and high accuracy of our BIST system. Based on the BIST results, a novel method of diagnosing the prototype to speed up the time-to-market is also proposed and demonstrated by our BIST system. |
URI: | http://hdl.handle.net/11536/18182 |
ISBN: | 0-7695-2235-1 |
ISSN: | 1081-7735 |
期刊: | 13TH ASIAN TEST SYMPOSIUM, PROCEEDINGS |
起始頁: | 62 |
結束頁: | 67 |
顯示於類別: | 會議論文 |