完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chung, SH | en_US |
dc.contributor.author | Hsieh, MH | en_US |
dc.contributor.author | Liu, JC | en_US |
dc.date.accessioned | 2014-12-08T15:25:48Z | - |
dc.date.available | 2014-12-08T15:25:48Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-7803-8469-5 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18230 | - |
dc.identifier.uri | http://dx.doi.org/10.1109/ISAPM.2004.1287988 | en_US |
dc.description.abstract | Wafer manufacturers usually face critical problems when making decisions regarding to the tool portfolio elimination, mainly due to the dramatic and frequent influences from their internal and external environments. This paper is aimed to develop a mechanism, named Tool Portfolio Elimination Mechanism (TPEM), to evaluate the impacts on production performance and capital expenditure, and to determine which equipment is suitable for pruning. In TPEM, there are four stages to decide tool portfolio elimination according to the PDCA cycle. Meanwhile, the simulation results show; that the fab production performance and cost are much improved by the TPEM algorithm. Especially, it can be applied and implemented to industry very quickly and easily. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A tool portfolio elimination mechanism (TPEM) for a wafer fab | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/ISAPM.2004.1287988 | en_US |
dc.identifier.journal | 2004 SEMICONDUCTOR MANUFACTURING TECHNOLOGY WORKSHOP PROCEEDINGS | en_US |
dc.citation.spage | 51 | en_US |
dc.citation.epage | 53 | en_US |
dc.contributor.department | 工業工程與管理學系 | zh_TW |
dc.contributor.department | Department of Industrial Engineering and Management | en_US |
dc.identifier.wosnumber | WOS:000225401500012 | - |
顯示於類別: | 會議論文 |