標題: The impact of STI induced reliabilities for scaled p-MOSFET in an advanced multiple oxide CMOS technology
作者: Chung, SS
Yeh, CH
Feng, SJ
Lai, CS
Yang, JJ
Chen, CC
Jin, Y
Chen, SC
Liang, MS
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2004
摘要: In this paper, we present new results on the width dependent hot-carrier (HC) reliabilities for shallow-trench-isolated (STI) pMOSFETs in a multiple oxide CMOS technology. For the first time, different phenomena in pMOSFET for a multiple oxide process have been observed. Extensive studies have been made for ALD grown and plasma treated oxide pMOSFETs. Experimental data shows that the drain current degradation is enhanced for a reducing gate width. For thick oxide, the I-D degradation is due to the channel length shortening, and electron trap is dominant for the device degradation. While for thin gate oxide, the I-D degradation is due to width narrowing, and hole trap is dominant, in which both electron and hole trap induced V-T shifts are significant. The degradation in thick-oxide pMOSFETs causes an increase of off-state leakage Current and an increase of DeltaV(T) in thin-oxide with reduced width.
URI: http://hdl.handle.net/11536/18279
ISBN: 0-7803-8454-7
期刊: IPFA 2004: PROCEEDINGS OF THE 11TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS
起始頁: 279
結束頁: 282
Appears in Collections:Conferences Paper