完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tang, CS | en_US |
dc.contributor.author | Lo, SC | en_US |
dc.contributor.author | Lee, JW | en_US |
dc.contributor.author | Tsai, JH | en_US |
dc.contributor.author | Li, YM | en_US |
dc.date.accessioned | 2014-12-08T15:25:52Z | - |
dc.date.available | 2014-12-08T15:25:52Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-9728422-9-2 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18292 | - |
dc.description.abstract | Silicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (VTH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study, both drift-difftision (DD) and density gradient (DG) models demonstrate that the thickness of Si film greatly affects the threshold voltage (5 similar to 15% variation). It is found that the thickness of Si film decreases, VTH variation increases; and the dependence relation is nonlinear. Therefore, this effect must be taken into account for the realization of double gate SOI ULSI circuit. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | double-gate devices | en_US |
dc.subject | ultrathin body | en_US |
dc.subject | quantum mechanical effects | en_US |
dc.subject | threshold voltage | en_US |
dc.subject | modeling and simulation | en_US |
dc.title | A study of the threshold voltage variations for ultrathin body double gate SOI MOSFETs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | NSTI NANOTECH 2004, VOL 3, TECHNICAL PROCEEDINGS | en_US |
dc.citation.spage | 145 | en_US |
dc.citation.epage | 148 | en_US |
dc.contributor.department | 電子物理學系 | zh_TW |
dc.contributor.department | Department of Electrophysics | en_US |
dc.identifier.wosnumber | WOS:000223078200039 | - |
顯示於類別: | 會議論文 |