標題: Novel programmable digital signal processor for multimedia applications
作者: Lin, LC
Lin, TJ
Lee, CC
Chao, CM
Chen, SK
Liu, CH
Hsiao, PC
Liu, CW
Jen, CW
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2004
摘要: This paper presents a novel DSP architecture for multimedia applications. The DSP core is a simple RISC processor from the programmer's view, which has a high-performance DSP unit and the applications can be easily targeted on the RISC shell to reduce the development time. Moreover, the DSP unit is itself a fully-programmable 4-way VLIW datapath, which has a novel ping-pong register file. To smooth the instruction execution of the two-level programmable DSP processor and improve the code density, we propose a hierarchical encoding scheme for variable-length instructions. The simulations show that our DSP has comparable performance with state-of-the-art DSP architectures, and the hierarchical instruction encoding saves 31%-64% code sizes compared to the fixed-length instruction encoding.
URI: http://hdl.handle.net/11536/18305
ISBN: 0-7803-8660-4
期刊: PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY
起始頁: 121
結束頁: 124
Appears in Collections:Conferences Paper