完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, CC | en_US |
dc.contributor.author | Lin, TJ | en_US |
dc.contributor.author | Liu, CW | en_US |
dc.contributor.author | Jen, CW | en_US |
dc.date.accessioned | 2014-12-08T15:25:52Z | - |
dc.date.available | 2014-12-08T15:25:52Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.isbn | 0-7803-8660-4 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18310 | - |
dc.description.abstract | This paper presents a novel technique to reduce the area of the hardwired lookup table (LUT) of DA-based FIR filters. It explores the optimal quantization on the real-valued LUT with optimal global scaling and error distribution, and we apply an effective error measure to estimate the quantization error on the FIR coefficients. Our approach enables designers to explicitly trade the quality for simple implementations at finer granularity than that solely by reducing the coefficient wordlengths. Moreover, in our simulations, the proposed method can save 30%similar to 40% silicon area of conventional DA-based FIR filters under identical error constraints. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Complexity-aware design of DA-based fir filters | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY | en_US |
dc.citation.spage | 445 | en_US |
dc.citation.epage | 448 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000227668700112 | - |
顯示於類別: | 會議論文 |