A thermal-aware power management Soft-IP for platform-based SoC designs

Abstract

A novel thermal-aware power management (TAPM) Software Intellectual Property (Soft-IP) for modem platform-based SoC designs is presented. This research proposes the system-level architecture of thermal-aware power management, which includes a power management bus (PMB), TAPM Soft-IP and interface circuitry for proposed PMB. Each component of proposed design is encapsulated into a Soft-IP. With above design, system architects are able to incorporate on-chip power-controls and sensors to achieve nominal power dissipation and ensure the targeting system working within specification. The design yields intricate control and optimal management with little system overhead and minimum hardware requirements, as well as provides the flexibility to support different management schemes. The proposed system and its components are designed, implemented and verified by a prototype chip, which was fabricated in a TSMC 0.25 mu m 1P5M standard CMOS technology through National Chip Implementation Center (CIC), Taiwan.