溫度管理系統之界面電路設計與實作

Abstract

在晶片系統設計上，隨著執行速度的增加以及複雜度的迅速成長，使得晶片上某些地方出現過熱點；這些過熱點會造成新的潛在問題，像是時脈訊號的不同步，元件參數的改變，甚至是整個系統的故障。有鑒於這些原因，先前的研究[1-3] 提出一個使用於晶片系統的純數位設計溫度管理系統來解決晶片上溫度相關的問題。然而，由於當時矽智財之間界面連接的架構並不成熟，此溫度管理系統未明確定義欲使用的界面，以致於不完全適合用在以矽智財為基礎的晶片系統設計流程。本論文主要目的便是經由增加一個標準界面—系統管理匯流排 [4] 來改進此溫度管理系統；這個匯流排目前廣泛使用在系統、功率和溫度管理元件上。我們強調三個對溫度管理系統加強的地方：首先，透過對部份電路的改進與最佳化實現溫度管理系統時使用了較小的面積；第二，加上一個界面電路使溫度管理系統變成一個完整的矽智財；第三，所設計的界面電路區塊可重複使用於晶片系統的其它元件或矽智財，以整合成一個完整的溫度管理系統。整個系統以及界面電路的實現使用的是台灣積體電路公司的 0.25 微米 CMOS 製程。

The increasing speed and exploding complexity on System-on-Chip (SoC) designs have led to overheating points on a die, which causing new potential problems such as clock unsynchronization, parameter mismatches, and system failure. A pure digital designed thermal management system has been proposed to solve thermal problems for SoC design in previous research [1-3]. Due to the un-mutual architecture of interconnection between Intellectual Property (IP) cores, above systems did not define its interface circuitry at that time. Thus, it does not fully compatible to modern IP-based SoC design flow. This thesis aims to improve this system to become a complete IP by adding a standard interface. System Management Bus (SMBus) [4] is selected as the interface circuitry, which is widely used in system, power and thermal management components. By adding above interface circuitry, three enhancements are emphasized for the targeting system: first, reducing the core area; second, designing interface circuitry to be a sufficient soft IP; third, providing interface circuitry as sub-blocks for other designs. The whole system, includes the interface circuitry, is implemented in TSMC 0.25 micron CMOS technology.