An efficient memory-based FFT architecture

標題:	An efficient memory-based FFT architecture
作者:	Chang, CK Hung, CP Chen, SG 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	2003
摘要:	This paper proposes an efficient memory-based radix-2 FFT architecture, which greatly improves the memory-based FFT [5], [6] by reducing 50% memory size requirement, while maintaining a simple address generator. Specifically the memory size is reduced to 1.25N words. In addition, the multiplier utilization rate is 100%.
URI:	http://hdl.handle.net/11536/18472
ISBN:	0-7803-7761-3
期刊:	PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II: COMMUNICATIONS-MULTIMEDIA SYSTEMS & APPLICATIONS
起始頁:	129
結束頁:	132
顯示於類別：	會議論文