An efficient memory-based FFT architecture

Title:	An efficient memory-based FFT architecture
Authors:	Chang, CK Hung, CP Chen, SG 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
Issue Date:	2003
Abstract:	This paper proposes an efficient memory-based radix-2 FFT architecture, which greatly improves the memory-based FFT [5], [6] by reducing 50% memory size requirement, while maintaining a simple address generator. Specifically the memory size is reduced to 1.25N words. In addition, the multiplier utilization rate is 100%.
URI:	http://hdl.handle.net/11536/18472
ISBN:	0-7803-7761-3
Journal:	PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II: COMMUNICATIONS-MULTIMEDIA SYSTEMS & APPLICATIONS
Begin Page:	129
End Page:	132
Appears in Collections:	Conferences Paper