完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lee, JS | en_US |
dc.contributor.author | Hsu, PL | en_US |
dc.date.accessioned | 2014-12-08T15:26:08Z | - |
dc.date.available | 2014-12-08T15:26:08Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.isbn | 0-7803-7952-7 | en_US |
dc.identifier.issn | 1062-922X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18537 | - |
dc.description.abstract | For complex and large-scale semiconductor manufacturing systems, using real devices for system integration and testing not only increases the cost but also takes a longer time. In this paper, a systematic approach for the emulator design of the manufacturing equipment to achieve system integration is proposed. In the proposed approach, the integration definition language 0 (IDEF0) and Petri net (PN) are applied to perform the functional and behavior analyses of the equipment, and then a verified PN model can be obtained for the implementation of emulators. An application of a rapid thermal process (RTP) in semiconductor manufacturing systems is provided to illustrate the design procedure of the developed approach. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Petri nets | en_US |
dc.subject | system integration | en_US |
dc.subject | emulator design | en_US |
dc.subject | IDEF0 | en_US |
dc.subject | rapid thermal process | en_US |
dc.subject | semiconductor | en_US |
dc.subject | manufacturing systems | en_US |
dc.title | An IDEF0/Petri net approach to the system integration in semiconductor manufacturing systems | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2003 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS, VOLS 1-5, CONFERENCE PROCEEDINGS | en_US |
dc.citation.spage | 4910 | en_US |
dc.citation.epage | 4915 | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.identifier.wosnumber | WOS:000186578600799 | - |
顯示於類別: | 會議論文 |