A novel LCD driver testing technique using logic test channels

Full metadata record

DC Field	Value	Language
dc.contributor.author	Su, CC	en_US
dc.contributor.author	Wang, WJ	en_US
dc.contributor.author	Wang, CH	en_US
dc.contributor.author	Tseng, IS	en_US
dc.date.accessioned	2014-12-08T15:26:11Z	-
dc.date.available	2014-12-08T15:26:11Z	-
dc.date.issued	2003	en_US
dc.identifier.isbn	0-7803-7659-5	en_US
dc.identifier.uri	http://hdl.handle.net/11536/18577	-
dc.description.abstract	This paper proposes a novel voltage measurement technique for LCD driver testing by the use of logic test channel of an ATE. The method is able to achieve less than 1mV error with the presence of 32mV RMS noise.	en_US
dc.language.iso	en_US	en_US
dc.title	A novel LCD driver testing technique using logic test channels	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE	en_US
dc.citation.spage	657	en_US
dc.citation.epage	662	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:000181801600121	-
Appears in Collections:	Conferences Paper