完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wang, CY | en_US |
dc.contributor.author | Yang, YC | en_US |
dc.contributor.author | Jon, JY | en_US |
dc.date.accessioned | 2014-12-08T15:26:21Z | - |
dc.date.available | 2014-12-08T15:26:21Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.isbn | 0-7803-7765-6 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18714 | - |
dc.description.abstract | This paper presents an effective multiplier synthesis algorithm for cell-based multipliers. By using a novel tree generation algorithm with timing consideration for each vertical compressor slice(VCS), our synthesizer generates multipliers automatically with very promising results. | en_US |
dc.language.iso | en_US | en_US |
dc.title | An effective physical synthesis technique for multiplier | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2003 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS | en_US |
dc.citation.spage | 192 | en_US |
dc.citation.epage | 195 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000189391000050 | - |
顯示於類別: | 會議論文 |