完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Fu, DK | en_US |
dc.contributor.author | Chen, SH | en_US |
dc.contributor.author | Chang, HC | en_US |
dc.contributor.author | Chang, EY | en_US |
dc.date.accessioned | 2014-12-08T15:26:28Z | - |
dc.date.available | 2014-12-08T15:26:28Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.isbn | 0-8194-4500-2 | en_US |
dc.identifier.issn | 0277-786X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18798 | - |
dc.description.abstract | In this study, an etch back process with I-line Stepper lithography and phase shift mask (PSM) is demonstrated for sub-micron T-gate fabrication. The opening after I-line lithography using PSM and first RIE etch of silicon nitride is 0.25mum. The opening after second silicon nitride deposition and RIE etch is decreased to 0.16mum. After metal deposition and lift-off, the developed T-shaped gate shows a footprint smaller than 0.2mum. The novel technique is a high throughput T-gate process compared to conventional E-beam technology and can be applied to mass production of high frequency GaAs-based FETs and MMIC. | en_US |
dc.language.iso | en_US | en_US |
dc.title | An etch back technique to achieve sub-micron T-gate for GaAsFETs using I-line stepper and phase shift mask (PSM) | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE ELEVENTH INTERNATIONAL WORKSHOP ON THE PHYSICS OF SEMICONDUCTOR DEVICES, VOL 1 & 2 | en_US |
dc.citation.volume | 4746 | en_US |
dc.citation.spage | 1437 | en_US |
dc.citation.epage | 1439 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.identifier.wosnumber | WOS:000177351400293 | - |
顯示於類別: | 會議論文 |