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dc.contributor.authorChen, PLen_US
dc.contributor.authorLee, CYen_US
dc.date.accessioned2014-12-08T15:26:36Z-
dc.date.available2014-12-08T15:26:36Z-
dc.date.issued2002en_US
dc.identifier.isbn0-7803-7523-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/18897-
dc.description.abstractA compact software-controlled clock multiplier for SoC application is presented in this paper. The control mechanism of clock multiplier includes frequency acquisition, phase acquisition and phase/frequency maintenance modes; these operations sequence are programmable. Our proposed clock multiplier is integrated with an 8-bit microcontroller in order to verify the proposed software-controlled mechanism. The control mechanism is sharing with the computing power of microcontroller. A proto-type chip has been implemented with 0.35 um 1P4M CMOS process that can operate from 25MHz to 80MHz. The multiplication factor can range from 2 to 128 and software instructions are less than 90 instructions. Thus it not only reduces the cost and design complexity of clock multiplier, but also offers particular advantages, especially when computing power is already available.en_US
dc.language.isoen_USen_US
dc.titleA compact software-controlled clock multiplier for SoC applicationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGSen_US
dc.citation.spage499en_US
dc.citation.epage502en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000181336700127-
Appears in Collections:Conferences Paper