完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHsu, CCen_US
dc.contributor.authorWu, JTen_US
dc.date.accessioned2014-12-08T15:26:38Z-
dc.date.available2014-12-08T15:26:38Z-
dc.date.issued2002en_US
dc.identifier.isbn0-7803-7310-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/18934-
dc.description.abstractA digitally programmable-gain amplifier (PGA) is realized using a 0.35 mum CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.en_US
dc.language.isoen_USen_US
dc.titleA 125 MHz 86 dB IM3 programmable-gain amplifieren_US
dc.typeProceedings Paperen_US
dc.identifier.journal2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERSen_US
dc.citation.spage32en_US
dc.citation.epage35en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000176890500008-
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