Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, MC | en_US |
dc.contributor.author | Tsai, CW | en_US |
dc.contributor.author | Gu, SH | en_US |
dc.contributor.author | Wang, TH | en_US |
dc.date.accessioned | 2014-12-08T15:26:38Z | - |
dc.date.available | 2014-12-08T15:26:38Z | - |
dc.date.issued | 2002 | en_US |
dc.identifier.isbn | 0-7803-7352-9 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18936 | - |
dc.description.abstract | The impact of soft breakdown location on V, hysteresis in partially depleted SOI nMOSFETs with ultra-thin oxide (1.6nm) is investigated. Two breakdown enhanced hysteresis modes are identified. In a channel breakdown MOSFET, excess holes attributed to valence electron tunneling flow to the floating body and thus cause V, hysteresis in gate bias switching. As a contrast, in a drainedge breakdown device, enhanced V, hysteresis is observed during drain bias switching because of increased band-to-band tunneling current. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Soft breakdown enhanced hysteresis effects in ultra-thin oxide SOI nMOSFETs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 40TH ANNUAL PROCEEDINGS: INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | en_US |
dc.citation.spage | 404 | en_US |
dc.citation.epage | 408 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000176016400065 | - |
Appears in Collections: | Conferences Paper |