Design on ESD protection circuit with very low and constant input capacitance

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chen, TY	en_US
dc.contributor.author	Ker, MD	en_US
dc.date.accessioned	2014-12-08T15:26:51Z	-
dc.date.available	2014-12-08T15:26:51Z	-
dc.date.issued	2001	en_US
dc.identifier.isbn	0-7695-1026-4	en_US
dc.identifier.uri	http://hdl.handle.net/11536/19100	-
dc.language.iso	en_US	en_US
dc.title	Design on ESD protection circuit with very low and constant input capacitance	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, PROCEEDINGS	en_US
dc.citation.spage	247	en_US
dc.citation.epage	248	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000168102000037	-
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