完整後設資料紀錄
DC 欄位語言
dc.contributor.authorYang, JNen_US
dc.contributor.authorLee, CYen_US
dc.contributor.authorHsu, TYen_US
dc.contributor.authorHsu, TRen_US
dc.contributor.authorWang, CCen_US
dc.date.accessioned2014-12-08T15:27:05Z-
dc.date.available2014-12-08T15:27:05Z-
dc.date.issued2000en_US
dc.identifier.isbn0-7803-6475-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/19318-
dc.description.abstractA 2.4GHz low noise amplifier has been designed in a standard CMOS 0-35 um process. The transistor model is Bsim3 for 0.35um process. The amplifier provides a forward gain of 33dB with a noise figure only 0.92dB while drawing 17mw from a 1.5 V supply. Design simulation results are presented In this paper.en_US
dc.language.isoen_USen_US
dc.titleA 1.5-V, 2.4GHz CMOS low-noise amplifieren_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-IIIen_US
dc.citation.spage1010en_US
dc.citation.epage1012en_US
dc.contributor.department電機學院zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000172099300236-
顯示於類別:會議論文