標題: A CPLD-based voltage/current vector controller for 3-phase PWM inverters
作者: Jyang, JY
Tzou, YY
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 1998
摘要: This paper presents the design and implementation of a vector control IC using complex programmable logic device (CPLD). A vector oriented control structure using integer arithmetic has been developed for the voltage or current regulation of 3-phase PWM inverters. This vector control IC can he used for the voltage or current control of a 3-phase PWM inverter using a vector command with specified amplitude, frequency, and phase. It has four operation modes: voltage or current control in either stationary or synchronous reference frame. This vector control IC is designed as a co-processor for a general-purpose microcontroller used for sc motor control and 3-phase power supplies. This vector control IC is realized with a 10-bit data bus and employs about 40 thousands logic gates of a CPLD (FLEX 10K 100) from Altera eo. The sampling rate can be programmed up to 50 kHz. Simulation and experimental results are given to illustrate the performance of the designed vector control IC.
URI: http://hdl.handle.net/11536/19556
ISBN: 0-7803-4489-8
ISSN: 0275-9306
期刊: PESC 98 RECORD - 29TH ANNUAL IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1 AND 2
起始頁: 262
結束頁: 268
顯示於類別:會議論文