A new bride damage characterization technique for evaluating hot carrier reliability of flash memory cell after P/E cycles

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chung, SS	en_US
dc.contributor.author	Yih, CM	en_US
dc.contributor.author	Cheng, SM	en_US
dc.contributor.author	Liang, MS	en_US
dc.date.accessioned	2014-12-08T15:27:25Z	-
dc.date.available	2014-12-08T15:27:25Z	-
dc.date.issued	1997	en_US
dc.identifier.isbn	4-930813-75-1	en_US
dc.identifier.uri	http://hdl.handle.net/11536/19676	-
dc.language.iso	en_US	en_US
dc.title	A new bride damage characterization technique for evaluating hot carrier reliability of flash memory cell after P/E cycles	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	1997 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS	en_US
dc.citation.spage	111	en_US
dc.citation.epage	112	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:A1997BJ59D00053	-
顯示於類別：	會議論文