Characterization of various stress-induced oxide traps in MOSFET's by using a novel transient current technique

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Wang, TH	en_US
dc.contributor.author	Chiang, LP	en_US
dc.contributor.author	Zous, NK	en_US
dc.contributor.author	Chang, TE	en_US
dc.contributor.author	Huang, C	en_US
dc.date.accessioned	2014-12-08T15:27:27Z	-
dc.date.available	2014-12-08T15:27:27Z	-
dc.date.issued	1997	en_US
dc.identifier.isbn	0-7803-4101-5	en_US
dc.identifier.uri	http://hdl.handle.net/11536/19713	-
dc.description.abstract	A new oxide trap characterization technique by employing a two-phase subthreshold current measurement has been developed. By varing the gate bias and the drain bias in measurement, the field and temperature dependences of oxide charge detrapping and the spatial distributions of various stress induced oxide traps are characterized.	en_US
dc.language.iso	en_US	en_US
dc.title	Characterization of various stress-induced oxide traps in MOSFET's by using a novel transient current technique	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST	en_US
dc.citation.spage	89	en_US
dc.citation.epage	92	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000072059200019	-
顯示於類別：	會議論文