完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lai, CS | en_US |
dc.contributor.author | Lee, CL | en_US |
dc.contributor.author | Lei, TF | en_US |
dc.contributor.author | Chao, TS | en_US |
dc.contributor.author | Peng, CH | en_US |
dc.contributor.author | Wang, HC | en_US |
dc.date.accessioned | 2014-12-08T15:27:34Z | - |
dc.date.available | 2014-12-08T15:27:34Z | - |
dc.date.issued | 1996 | en_US |
dc.identifier.isbn | 1-55899-331-2 | en_US |
dc.identifier.issn | 0272-9172 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19812 | - |
dc.description.abstract | The electrical characteristics of thin gate dielectrics prepared by low temperature (850 degrees C) two-step N2O nitridation (LTN) process are presented. The gate oxides were grown by wet oxidation at 800 degrees C and then annealed in N2O at 850 degrees C. The oxide with N2O anneal, even for low temperature (850 degrees C), had nitrogen incorporation at oxide/silicon interface. The charge trapping phenomena and interface-state generation (Delta D-itm) induced by constant current stressing were reduced and charge-to-breakdown (Q(bd)) under constant current stressing was increased. This LTN oxynitride was used as gate dielectric for N-channel MOSFET, whose hot-carrier immunity was shown improved and reverse short channel effect (RSCE) was suppressed. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Low temperature (850 degrees C) two-step N2O annealed thin gate oxides | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | MATERIALS RELIABILITY IN MICROELECTRONICS VI | en_US |
dc.citation.volume | 428 | en_US |
dc.citation.spage | 405 | en_US |
dc.citation.epage | 408 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1996BG81V00055 | - |
顯示於類別: | 會議論文 |