標題: 低溫製作複晶矽薄膜電晶體的特性改善技術
Improving Technologies of Low Temperature Processed Polycrystalline Silicon Thin-Film Transistors
作者: 范慶麟
Ching-Lin Fan
葉清發
Ching-Fa Yeh
電子研究所
關鍵字: 複晶矽薄膜電晶體; 低溫製程; 快速熱處理;poly-Si thin film transistor; low temperature process; rapid- thermal annealing(RTA)
公開日期: 1994
摘要: 使用玻璃基板低溫製作複晶矽薄膜電晶體將是主要的趨勢. 在本論文裡, 為了改善低溫製作複晶矽薄膜電晶體的電特性, 我們提出了三種改善方 法. 第一種改善方法是薄化閘極氧化層的厚度. 複晶矽薄膜電晶體具有較 薄閘極氧化層會比厚的擁有更好的導通電特性. 第二種方法是新的二步驟 活化法, 它的優點是它可以同時活複晶細島嶼層和低溫閘極氧化層. 由於 新的二步驟活化法可以活化這低溫閘極氧化層, 所以比起二步驟活化法, 此法對臨界電壓將有較大的改善. 第三種改善方法是一種嶄新活化法. 它 的名字叫三步同時活化法. 此法可同時活化複晶細島嶼層, 低溫閘極氧化 層, 及雜質活化. 這活化法的主要優點, 不僅可以減少製程時間, 而且又 可以大幅改善複晶矽薄膜電晶體的電特性. In order to use glass substrate, low temperature processed (LTP) poly-Si TFT will be the main tendency. To improve the performance of (LTP) poly-Si TFT, we propose three kinds of improving methods that will be decribed in this thesis. The first method is to scale down the thickness of the gate insulator. To scale down the TFTs gate oxide can acquire an more excellent ON state performance than the TFTs thick gate oxide. The second method is the new two-steps annealing method. The method isa modified two-steps method. Its advantage is that it can anneal the active poly islands and the low temperature gate oxide at the same time. The new two- steps annealing method can have larger improvement of threshold voltage than the conventional two-steps annealing because it can anneal and densify the low temperature gate oxide. The third method is the novel annealing method, also called 3SCT annealing method. The 3SCT annealing method can anneal the active poly, gate oxide, and dopant activation. The 3SCT annealing method not only can largely reduce the process time but also can significantly improve the performance of LTP poly-Si TFTs.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT830430091
http://hdl.handle.net/11536/59283
顯示於類別:畢業論文