Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wu, CY | en_US |
dc.contributor.author | Tseng, YK | en_US |
dc.date.accessioned | 2014-12-08T15:27:38Z | - |
dc.date.available | 2014-12-08T15:27:38Z | - |
dc.date.issued | 1996 | en_US |
dc.identifier.isbn | 0-7803-3650-X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/19893 | - |
dc.description.abstract | A new full-swing BiCMOS logic circuits called the bootstrapped multi-emitter BICMOS ((BM)-M-2-BiCMOS) logic is proposed and analyzed. HSPICE logic is simulations have been performed to compare speed performance of the new BICMOS logic circuit with those of CMOS, conventional BICMOS, and Bootstrapped BICMOS (BS-BICMOS) logic circuits, in 1 mu m technology. It has been shown that as compared to BS-BICMOS (CMOS) logic gate, the new (BM)-M-2-BiCMOS 3-input NAND gate with 2V supply voltage and 0.5pF output loading has about 36% (72%) improvement in the propagation delay time whereas the (BM)-M-2-BiCMOS 5- and 7- input NAND gates have 1.84 (2.4) and 2.16 (3.1) times of improvement, respectively. This advantageous performance makes the (BM)-M-2-BiCMOS feasible in many low-voltage BICMOS applications. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Bipolar bootstrapped multi-emitter BiCMOS ((BM)-M-2-BiCMOS) logic for low-voltage applications | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | ICECS 96 - PROCEEDINGS OF THE THIRD IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2 | en_US |
dc.citation.spage | 1174 | en_US |
dc.citation.epage | 1177 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1996BH56B00292 | - |
Appears in Collections: | Conferences Paper |