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dc.contributor.authorWu, CYen_US
dc.contributor.authorTseng, YKen_US
dc.date.accessioned2014-12-08T15:27:38Z-
dc.date.available2014-12-08T15:27:38Z-
dc.date.issued1996en_US
dc.identifier.isbn0-7803-3650-Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/19893-
dc.description.abstractA new full-swing BiCMOS logic circuits called the bootstrapped multi-emitter BICMOS ((BM)-M-2-BiCMOS) logic is proposed and analyzed. HSPICE logic is simulations have been performed to compare speed performance of the new BICMOS logic circuit with those of CMOS, conventional BICMOS, and Bootstrapped BICMOS (BS-BICMOS) logic circuits, in 1 mu m technology. It has been shown that as compared to BS-BICMOS (CMOS) logic gate, the new (BM)-M-2-BiCMOS 3-input NAND gate with 2V supply voltage and 0.5pF output loading has about 36% (72%) improvement in the propagation delay time whereas the (BM)-M-2-BiCMOS 5- and 7- input NAND gates have 1.84 (2.4) and 2.16 (3.1) times of improvement, respectively. This advantageous performance makes the (BM)-M-2-BiCMOS feasible in many low-voltage BICMOS applications.en_US
dc.language.isoen_USen_US
dc.titleBipolar bootstrapped multi-emitter BiCMOS ((BM)-M-2-BiCMOS) logic for low-voltage applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalICECS 96 - PROCEEDINGS OF THE THIRD IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2en_US
dc.citation.spage1174en_US
dc.citation.epage1177en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1996BH56B00292-
Appears in Collections:Conferences Paper