標題: | RECESSED-GATE ALGAAS/INGAAS/GAAS PSEUDORMORPHIC HEMT WITH SI-PLANAR-DOPED ETCH-STOP LAYER |
作者: | LAN, WH LIN, WJ PENG, CK CHEN, SS TU, SL 材料科學與工程學系 電子工程學系及電子研究所 Department of Materials Science and Engineering Department of Electronics Engineering and Institute of Electronics |
關鍵字: | HIGH ELECTRON MOBILITY TRANSISTORS;ETCHING |
公開日期: | 30-三月-1995 |
摘要: | An improved slot etch technique based on an Si planar doped laver has been applied to gate recessing in the fabrication of AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistors (HEMTs). The devices exhibited comparable g(m) with much better breakdown and leakage behaviour than conventional pseudomorphic HEMT devices. |
URI: | http://dx.doi.org/10.1049/el:19950374 http://hdl.handle.net/11536/2006 |
ISSN: | 0013-5194 |
DOI: | 10.1049/el:19950374 |
期刊: | ELECTRONICS LETTERS |
Volume: | 31 |
Issue: | 7 |
起始頁: | 592 |
結束頁: | 594 |
顯示於類別: | 期刊論文 |