Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | LAN, WH | en_US |
dc.contributor.author | LIN, WJ | en_US |
dc.contributor.author | PENG, CK | en_US |
dc.contributor.author | CHEN, SS | en_US |
dc.contributor.author | TU, SL | en_US |
dc.date.accessioned | 2014-12-08T15:03:29Z | - |
dc.date.available | 2014-12-08T15:03:29Z | - |
dc.date.issued | 1995-03-30 | en_US |
dc.identifier.issn | 0013-5194 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1049/el:19950374 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2006 | - |
dc.description.abstract | An improved slot etch technique based on an Si planar doped laver has been applied to gate recessing in the fabrication of AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistors (HEMTs). The devices exhibited comparable g(m) with much better breakdown and leakage behaviour than conventional pseudomorphic HEMT devices. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | HIGH ELECTRON MOBILITY TRANSISTORS | en_US |
dc.subject | ETCHING | en_US |
dc.title | RECESSED-GATE ALGAAS/INGAAS/GAAS PSEUDORMORPHIC HEMT WITH SI-PLANAR-DOPED ETCH-STOP LAYER | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1049/el:19950374 | en_US |
dc.identifier.journal | ELECTRONICS LETTERS | en_US |
dc.citation.volume | 31 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 592 | en_US |
dc.citation.epage | 594 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1995QT82300058 | - |
dc.citation.woscount | 1 | - |
Appears in Collections: | Articles |
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