AN ON-CHIP ESD PROTECTION CIRCUIT WITH COMPLEMENTARY SCR STRUCTURES FOR SUBMICRON CMOS ICS

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	KER, MD	en_US
dc.contributor.author	WU, CY	en_US
dc.contributor.author	JIANG, HC	en_US
dc.contributor.author	LEE, CY	en_US
dc.contributor.author	KO, J	en_US
dc.contributor.author	HSUE, P	en_US
dc.date.accessioned	2014-12-08T15:27:53Z	-
dc.date.available	2014-12-08T15:27:53Z	-
dc.date.issued	1994	en_US
dc.identifier.isbn	0-7803-2428-5	en_US
dc.identifier.uri	http://hdl.handle.net/11536/20136	-
dc.language.iso	en_US	en_US
dc.title	AN ON-CHIP ESD PROTECTION CIRCUIT WITH COMPLEMENTARY SCR STRUCTURES FOR SUBMICRON CMOS ICS	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	PROCEEDINGS OF THE 37TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2	en_US
dc.citation.spage	1145	en_US
dc.citation.epage	1148	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:A1994BD18X00251	-
顯示於類別：	會議論文