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dc.contributor.authorCHANG, RIen_US
dc.contributor.authorHSIAO, PYen_US
dc.date.accessioned2014-12-08T15:27:53Z-
dc.date.available2014-12-08T15:27:53Z-
dc.date.issued1994en_US
dc.identifier.isbn0-7803-1897-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/20138-
dc.language.isoen_USen_US
dc.titleA FUZZY-NEURO APPROACH FOR TIMING-DRIVEN SYSTEM PARTITIONING IN VLSI MULTI-CHIP DESIGNen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE THIRD IEEE CONFERENCE ON FUZZY SYSTEMS - IEEE WORLD CONGRESS ON COMPUTATIONAL INTELLIGENCE, VOLS I-IIIen_US
dc.citation.spage302en_US
dc.citation.epage307en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:A1994BC17S00054-
Appears in Collections:Conferences Paper