A NEW ALGORITHM AND ITS VLSI ARCHITECTURE DESIGN FOR CONNECTED COMPONENT LABELING

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	JEAN, SD	en_US
dc.contributor.author	LIU, CM	en_US
dc.contributor.author	CHANG, CC	en_US
dc.contributor.author	CHEN, Z	en_US
dc.date.accessioned	2014-12-08T15:27:54Z	-
dc.date.available	2014-12-08T15:27:54Z	-
dc.date.issued	1994	en_US
dc.identifier.isbn	0-7803-1915-X	en_US
dc.identifier.uri	http://hdl.handle.net/11536/20176	-
dc.language.iso	en_US	en_US
dc.title	A NEW ALGORITHM AND ITS VLSI ARCHITECTURE DESIGN FOR CONNECTED COMPONENT LABELING	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2: DIGITAL SIGNAL PROCESSING (DSP)	en_US
dc.citation.spage	B565	en_US
dc.citation.epage	B568	en_US
dc.contributor.department	資訊工程學系	zh_TW
dc.contributor.department	Department of Computer Science	en_US
dc.identifier.wosnumber	WOS:A1994BB77X00140	-
顯示於類別：	會議論文