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dc.contributor.authorLIN, YFen_US
dc.contributor.authorSHUNG, CBen_US
dc.date.accessioned2014-12-08T15:27:55Z-
dc.date.available2014-12-08T15:27:55Z-
dc.date.issued1994en_US
dc.identifier.isbn0-7803-1915-Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/20183-
dc.language.isoen_USen_US
dc.titleFAULT-TOLERANT ARCHITECTURES FOR SHARED BUFFER MEMORY SWITCHen_US
dc.typeProceedings Paperen_US
dc.identifier.journal1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3: COMMUNICATION & VISUAL SIGNAL PROCESSING (CVSP)en_US
dc.citation.spageC61en_US
dc.citation.epageC64en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1994BB77Y00016-
Appears in Collections:Conferences Paper