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dc.contributor.authorCheng, SMen_US
dc.contributor.authorYih, CMen_US
dc.contributor.authorYeh, JCen_US
dc.contributor.authorKuo, SNen_US
dc.contributor.authorChung, SSen_US
dc.date.accessioned2014-12-08T15:01:20Z-
dc.date.available2014-12-08T15:01:20Z-
dc.date.issued1997-11-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/16.641360en_US
dc.identifier.urihttp://hdl.handle.net/11536/202-
dc.description.abstractA new and accurate technique that allows the simultaneous determination of the spatial distributions of both interface states (N-it) and oxide charge (Q(ox)) will be presented. The gated-diode current measurement in combination with the gate-induced drain leakage (GIDL) current were performed to monitor the generation of both N-it and Q(ox) in n-MOSFET's. A special detrapping technique and simple calculations have been developed, from which the spatial distributions of both N-it and Q(ox) under various bias stress conditions, such as the hot-electron stress (I-G,I-max), I-B,I-max, and hot-hole stresses, can be determined. The calculation of gated-diode current by incorporating the extracted profiles of N-it and Q(ox) has been justified from numerical simulation. Results show very good agreement with the experimental results. The extracted interface damages for hot-electron and hot-hole stresses have very important applications for the study of hot-carrier reliability issues, in particular, on the design of flash EPROM, (EPROM)-P-2 cells since the above stress conditions, such as the I-G,I-max and hot-hole stress, are the major operating conditions for device programming and erasing, respectively.en_US
dc.language.isoen_USen_US
dc.titleA unified approach to profiling the lateral distributions of both oxide charge and interface states in n-MOSFET's under various bias stress conditionsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/16.641360en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume44en_US
dc.citation.issue11en_US
dc.citation.spage1908en_US
dc.citation.epage1914en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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