完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | TSAY, JC | en_US |
dc.contributor.author | CHANG, PY | en_US |
dc.date.accessioned | 2014-12-08T15:03:31Z | - |
dc.date.available | 2014-12-08T15:03:31Z | - |
dc.date.issued | 1995-02-01 | en_US |
dc.identifier.issn | 1045-9219 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/71.342137 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2057 | - |
dc.description.abstract | A two-step regularization method in which first permutation sequences and then broadcast planes are selected is proposed to design various regular iterative algorithms for matrix multiplication. The regular iterative algorithms are then spacetime mapped to regular arrays, such as mesh, cylindrical, two-layered mesh, and orbital arrays. The proposed method can be used to design regular arrays with execution time of less than N (problem size). | en_US |
dc.language.iso | en_US | en_US |
dc.subject | BROADCAST | en_US |
dc.subject | CYLINDRICAL ARRAY | en_US |
dc.subject | MESH ARRAY | en_US |
dc.subject | ORBITAL ARRAY | en_US |
dc.subject | PARALLEL ALGORITHM DESIGN | en_US |
dc.subject | PERMUTATION SEQUENCE | en_US |
dc.subject | PROPAGATION | en_US |
dc.subject | 2-LAYERED MESH ARRAY | en_US |
dc.subject | VLSI ARCHITECTURE | en_US |
dc.title | DESIGN OF EFFICIENT REGULAR ARRAYS FOR MATRIX MULTIPLICATION BY 2-STEP REGULARIZATION | en_US |
dc.type | Note | en_US |
dc.identifier.doi | 10.1109/71.342137 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS | en_US |
dc.citation.volume | 6 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 215 | en_US |
dc.citation.epage | 222 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | 工學院 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.contributor.department | College of Engineering | en_US |
dc.identifier.wosnumber | WOS:A1995QF36400015 | - |
dc.citation.woscount | 6 | - |
顯示於類別: | 期刊論文 |