Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lai, Ming-Hui | en_US |
dc.contributor.author | Wu, YewChung Sermon | en_US |
dc.contributor.author | Tung, Teng-Fu | en_US |
dc.contributor.author | Wu, Hung-Yu | en_US |
dc.date.accessioned | 2014-12-08T15:29:05Z | - |
dc.date.available | 2014-12-08T15:29:05Z | - |
dc.date.issued | 2010 | en_US |
dc.identifier.isbn | 978-1-60768-141-0 | en_US |
dc.identifier.issn | 1938-5862 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/20987 | - |
dc.identifier.uri | http://dx.doi.org/10.1149/1.3375628 | en_US |
dc.description.abstract | A cap oxide layer was employed to substantially decrease nickel residues and passivate the trap states of the devices. F+ implantation was used to drive Ni in alpha-Si layer to induce crystallization (DIC) process with cap oxide to reduce Ni concentration and minimize the trap-state density. As a result, DIC-TFT with cap oxide exhibit higher field-effect mobility, lower subthreshold slope, lower threshold voltage, higher on/off current ratio, and lower trap-state density (N-t) compared with conventional MIC TFTs. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Improved Performance of MIC Poly-Si TFTs Using Driven-in Nickel Induced Crystallization (DIC) with Cap SiO2 by F implantation | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1149/1.3375628 | en_US |
dc.identifier.journal | ADVANCED GATE STACK, SOURCE/DRAIN, AND CHANNEL ENGINEERING FOR SI-BASED CMOS 6: NEW MATERIALS, PROCESSES, AND EQUIPMENT | en_US |
dc.citation.volume | 28 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 405 | en_US |
dc.citation.epage | 407 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.identifier.wosnumber | WOS:000313489900046 | - |
Appears in Collections: | Conferences Paper |
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