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dc.contributor.authorChen, Chun-Chien_US
dc.contributor.authorYou, Hsin-Chiangen_US
dc.contributor.authorChang, Edward Yien_US
dc.contributor.authorKo, Fu-Hsiangen_US
dc.date.accessioned2014-12-08T15:29:14Z-
dc.date.available2014-12-08T15:29:14Z-
dc.date.issued2013-01-01en_US
dc.identifier.issn0957-4522en_US
dc.identifier.urihttp://dx.doi.org/10.1007/s10854-012-0761-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/21078-
dc.description.abstractIn this study, we synthesize two different sizes of gold nanoparticles (NPs) with uniform size distribution. A novel technique of fabricating gold NPs embedded capacitor devices utilizing chemical self-assembled gold NPs has been developed. Room temperature process and uniform size distribution of gold NPs device are built and characterized. These electronic devices have lower leakage current, no metal diffusion problem, larger memory window, better charge retention time and following Fowler-Nordheim tunneling model. This method enables the possibility of future memory applications to fabricate devices with this simple and versatile technique based on the NPs assembly.en_US
dc.language.isoen_USen_US
dc.titleRoom temperature self-organized gold nanoparticles materials for embedded electronic devicesen_US
dc.typeArticleen_US
dc.identifier.doi10.1007/s10854-012-0761-2en_US
dc.identifier.journalJOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICSen_US
dc.citation.volume24en_US
dc.citation.issue1en_US
dc.citation.spage376en_US
dc.citation.epage381en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000313799400054-
dc.citation.woscount0-
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