完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | HUANG, TH | en_US |
dc.contributor.author | CHEN, MJ | en_US |
dc.date.accessioned | 2014-12-08T15:03:35Z | - |
dc.date.available | 2014-12-08T15:03:35Z | - |
dc.date.issued | 1995-01-01 | en_US |
dc.identifier.issn | 0038-1101 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1016/0038-1101(94)E0037-F | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/2121 | - |
dc.description.abstract | The I-V characteristics of a gated lateral bipolar transistor in an n-MOSFET structure have been measured. The measured collector current has exhibited two distinct components: (i) the gate-con trolled collector current due to the modulation of the surface space-charge region; and (ii) the pure lateral bipolar transistor collector current which is independent of the gate bias applied. These two components have been separated experimentally and have been reproduced by analytic model expressions. The work is useful not only for understanding the hybrid-mode operation but also for designing appropriately the gated lateral bipolar transistors. | en_US |
dc.language.iso | en_US | en_US |
dc.title | EMPIRICAL MODELING FOR GATE-CONTROLLED COLLECTOR CURRENT OF LATERAL BIPOLAR-TRANSISTORS IN AN N-MOSFET STRUCTURE | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1016/0038-1101(94)E0037-F | en_US |
dc.identifier.journal | SOLID-STATE ELECTRONICS | en_US |
dc.citation.volume | 38 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 115 | en_US |
dc.citation.epage | 119 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1995QC42000016 | - |
dc.citation.woscount | 9 | - |
顯示於類別: | 期刊論文 |