Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, Hung-Bin | en_US |
dc.contributor.author | Chang, Chun-Yen | en_US |
dc.contributor.author | Hung, Min-Feng | en_US |
dc.contributor.author | Tang, Zih-Yun | en_US |
dc.contributor.author | Cheng, Ya-Chi | en_US |
dc.contributor.author | Wu, Yung-Chun | en_US |
dc.date.accessioned | 2014-12-08T15:29:32Z | - |
dc.date.available | 2014-12-08T15:29:32Z | - |
dc.date.issued | 2013-02-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.7567/JJAP.52.021302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/21236 | - |
dc.description.abstract | This work presents gate-all-around (GAA) polycrystalline silicon (poly-Si) nanowires (NWs) channel poly-Si/SiO2/Si3N4/SiO2/poly-Si (SONOS) nonvolatile memory (NVM) with a self-assembled Si nanocrystal (Si-NC) embedded charge trapping (CT) layer. Fabrication of the Si-NCs is simple and compatible with the current flash process. The 2-bit operations based on channel hot electrons injection for programming and channel hot holes injection for erasing are clearly achieved by the localized discrete trap. In the programming and erasing characteristics studies, the GAA structure can effectively reduce operation voltage and shorten pulse time. One-bit programming or erasing does not affect the other bit. In the high-temperature retention characteristics studies, the cell embedded with Si-NCs shows excellent electrons confinement vertically and laterally. With respect to endurance characteristics, the memory window does not undergo closure after 10(4) program/erase (P/E) cycle stress. The 2-bit operation for GAA Si-NCs NVM provides scalability, reliability and flexibility in three-dimensional (3D) high-density flash memory applications. (C) 2013 The Japan Society of Applied Physics | en_US |
dc.language.iso | en_US | en_US |
dc.title | A 2-bit/Cell Gate-All-Around Flash Memory of Self-Assembled Silicon Nanocrystals | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.7567/JJAP.52.021302 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS | en_US |
dc.citation.volume | 52 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000314466800009 | - |
dc.citation.woscount | 1 | - |
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