Title: Reliability of key technologies in 3D integration
Authors: Ko, Cheng-Ta
Chen, Kuan-Neng
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Issue Date: 1-Jan-2013
Abstract: 3D IC packaging offers miniaturization, high performance, low power dissipation, high density and heterogeneous integration. Through-silicon via (TSV) and bonding technologies are the key technologies of 3D IC, and the corresponding reliability has to be well evaluated and qualified before real production applications. This paper reviews the emerging 3D interconnection technologies in worldwide 3D integration platforms with the latest reliability assessment results, including the reliability demonstration of Cu and oxide hybrid bonding in Ziptronix's platform, micro-bump and adhesive hybrid bonding in ITRI's platform, adhesive bonding followed by TSV formation in WOW alliance's platform, wide I/O interface TSV interposer in Xilinx's platform, and the active and passive TSV interposer in Samsung, TSMC and ASE's platforms. With low temperature bonding and TSV processes, optimized design and material selection to lower the induced stress and warpage, these platforms are successfully developed with enhanced reliability. The reliability of key technologies in 3D integration with these representative platforms are summarized in the paper to address the feasibility of 3D IC in mass production, which could be the guidelines for future development and applications of 3D integration technology. (C) 2012 Elsevier Ltd. All rights reserved.
URI: http://dx.doi.org/10.1016/j.microrel.2012.08.011
http://hdl.handle.net/11536/21288
ISSN: 0026-2714
DOI: 10.1016/j.microrel.2012.08.011
Journal: MICROELECTRONICS RELIABILITY
Volume: 53
Issue: 1
Begin Page: 7
End Page: 16
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