標題: | Epitaxial Germanium on SOI Substrate and Its Application of Fabricating High I-ON/I-OFF Ratio Ge FinFETs |
作者: | Chung, Cheng-Ting Chen, Che-Wei Lin, Jyun-Chih Wu, Che-Chen Chien, Chao-Hsin Luo, Guang-Li Kei, Chi-Chung Hsiao, Chien-Nan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Epitaxial Ge on silicon on-insulator (SOI) substrates;fin field-effect transistors (FinFETs);forming gas annealing;Ge CMOS;germanium |
公開日期: | 1-Jun-2013 |
摘要: | Integrating germanium (Ge) thin film on silicon-on-insulator (SOI) substrate and fabricating Ge fin field-effect transistors (FinFETs) are demonstrated in this paper. Directly grown Ge film on a high-resistivity thin SOI substrate provides a good platform for fabricating advanced Ge devices. The SOI structure could effectively suppress junction leakage; therefore, high I-ON/I-OFF ratio (similar to 5 x 10(5), at V-D = 0.1 V) of the drain current is achieved. Tri-gate structure provides better short-channel control abilities for the Ge FinFETs, and the drain-induced barrier lowering and threshold voltage (V-TH) shift can be maintained at the level of similar to 110 mV/V and similar to 0.1 V, respectively, for Ge n-channel FinFET with L-channel = 120 nm and W-Fin = 40 nm. Multifin Ge FinFET with L-channel = 170 nm and W-Fin = 50 nm is also illustrated. Both N-and P-FinFETs possess high I-ON/I-OFF ratio over 104. Besides, the subthreshold swing could be reduced around 25% after forming gas annealing. |
URI: | http://dx.doi.org/10.1109/TED.2013.2259173 http://hdl.handle.net/11536/21857 |
ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2013.2259173 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 60 |
Issue: | 6 |
起始頁: | 1878 |
結束頁: | 1883 |
Appears in Collections: | Articles |
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