2.4-GHz 7.4-mW 300-kHz Flicker-Noise-Corner Direct Conversion Receiver Using 0.18 mu m CMOS and Deep-N-Well NPN BJT

Full metadata record

DC Field	Value	Language
dc.contributor.author	Chang, Wei-Ling	en_US
dc.contributor.author	Meng, Chin-Chun	en_US
dc.contributor.author	Syu, Jin-Siang	en_US
dc.contributor.author	Wang, Chia-Ling	en_US
dc.contributor.author	Huang, Guo-Wei	en_US
dc.date.accessioned	2014-12-08T15:30:53Z	-
dc.date.available	2014-12-08T15:30:53Z	-
dc.date.issued	2013	en_US
dc.identifier.isbn	978-1-4673-2932-3	en_US
dc.identifier.uri	http://hdl.handle.net/11536/22049	-
dc.description.abstract	A low-power low-flicker-noise receiver is demonstrated using 0.18 mu m CMOS technology. Vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are used to substitute the mixer switching core and the input stage of subsequent IF VGA. Compared with the conventional CMOS mixer, the excellent flicker noise performance is obtained. As a result, the receiver achieves a 47 dB voltage gain at 2.4-GHz, and the noise figure is 9.6 dB at IF=100 kHz and 5.6 dB for IF>300 kHz. The total current consumption is 4.3 mA at 1.8 V supply voltage.	en_US
dc.language.iso	en_US	en_US
dc.subject	low power	en_US
dc.subject	low flicker noise	en_US
dc.subject	direct-conversion receiver	en_US
dc.subject	deep-n-well vertical-NPN bipolar junction transistor	en_US
dc.subject	Gilbert cell mixer	en_US
dc.subject	poly phase filter	en_US
dc.title	2.4-GHz 7.4-mW 300-kHz Flicker-Noise-Corner Direct Conversion Receiver Using 0.18 mu m CMOS and Deep-N-Well NPN BJT	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2013 IEEE RADIO AND WIRELESS SYMPOSIUM (RWS)	en_US
dc.citation.spage	223	en_US
dc.citation.epage	225	en_US
dc.contributor.department	電機工程學系	zh_TW
dc.contributor.department	Department of Electrical and Computer Engineering	en_US
dc.identifier.wosnumber	WOS:000320762900072	-
Appears in Collections:	Conferences Paper