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DC 欄位語言
dc.contributor.authorLu, Senhg-Fengen_US
dc.contributor.authorGu, Jyh-Chyumen_US
dc.date.accessioned2014-12-08T15:03:40Z-
dc.date.available2014-12-08T15:03:40Z-
dc.date.issued2008en_US
dc.identifier.isbn978-2-8748-7007-1en_US
dc.identifier.urihttp://hdl.handle.net/11536/2207-
dc.identifier.urihttp://dx.doi.org/10.1109/EMICC.2008.4772256en_US
dc.description.abstractA CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18 mu m 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18 mu m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and P(1dB) of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.en_US
dc.language.isoen_USen_US
dc.title5.5 GHz Low Voltage and High Linearity RF CMOS Mixer Designen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/EMICC.2008.4772256en_US
dc.identifier.journal2008 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC)en_US
dc.citation.spage171en_US
dc.citation.epage174en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000268721400044-
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