Full metadata record
DC FieldValueLanguage
dc.contributor.authorLi, Yimingen_US
dc.contributor.authorSu, Hsin-Wenen_US
dc.contributor.authorChen, Yu-Yuen_US
dc.contributor.authorHsu, Sheng-Chiaen_US
dc.contributor.authorHuang, Wen-Tsungen_US
dc.date.accessioned2014-12-08T15:31:00Z-
dc.date.available2014-12-08T15:31:00Z-
dc.date.issued2013-09-01en_US
dc.identifier.issn0167-9317en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.mee.2013.03.076en_US
dc.identifier.urihttp://hdl.handle.net/11536/22107-
dc.description.abstractIn this work, based on the experimentally calibrated 3D device simulation, we for the first time estimate the impact of intrinsic parameter fluctuation on the electrical characteristic of 16-nm-gate TiN/HfO2 bulk FinFETs. The sources of intrinsic parameter fluctuation include the random discrete dopants, interface traps and work function differences, simultaneously. The full 3D simulated threshold voltage fluctuation, induced by the aforementioned random sources simultaneously, is 26.2 mV for the N-type bulk FinFET (and is 55.5 mV for the planar N-MOSFET). For the N-type bulk FinFE'T, the statistical sum of these fluctuations is 9.5% (and is 12.3% for the planar device) overestimation, compared with the full 3D simulation. One of the main reasons is the independence assumption on these random variables is destroyed owing to interactions to different extents among RDs, ITs and WKs. The coupled surface potentials cannot be simply estimated by using their statistical sum of individual random source. Under the same threshold voltage, compared with the result of the planar MOSFETs, more than 50% reduction on the threshold voltage fluctuation of the explored bulk FinFETs is observed owing to the benefit of 3D structural nature. (C) 2013 Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectRandom discrete dopanten_US
dc.subjectRandom interface trapen_US
dc.subjectRandom work functionen_US
dc.subjectCharacteristic fluctuationen_US
dc.subject16-nm-gateen_US
dc.subjectBulk FinETen_US
dc.subjectStatistical 3D device simulationen_US
dc.titleThe intrinsic parameter fluctuation on high-kappa/metal gate bulk FinFET devicesen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.mee.2013.03.076en_US
dc.identifier.journalMICROELECTRONIC ENGINEERINGen_US
dc.citation.volume109en_US
dc.citation.issueen_US
dc.citation.spage302en_US
dc.citation.epage305en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000321229200077-
dc.citation.woscount2-
Appears in Collections:Articles


Files in This Item:

  1. 000321229200077.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.