標題: Fast SIFT Design for Real-Time Visual Feature Extraction
作者: Chiu, Liang-Chi
Chang, Tian-Sheuan
Chen, Jiun-Yen
Chang, Nelson Yen-Chung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Feature extraction;SIFT;VLSI design
公開日期: 1-八月-2013
摘要: Visual feature extraction with scale invariant feature transform (SIFT) is widely used for object recognition. However, its real-time implementation suffers from long latency, heavy computation, and high memory storage because of its frame level computation with iterated Gaussian blur operations. Thus, this paper proposes a layer parallel SIFT (LPSIFT) with integral image, and its parallel hardware design with an on-the-fly feature extraction flow for real-time application needs. Compared with the original SIFT algorithm, the proposed approach reduces the computational amount by 90% and memory usage by 95%. The final implementation uses 580-K gate count with 90-nm CMOS technology, and offers 6000 feature points/frame for VGA images at 30 frames/s and similar to 2000 feature points/frame for 1920x1080 images at 30 frames/s at the clock rate of 100 MHz.
URI: http://dx.doi.org/10.1109/TIP.2013.2259841
http://hdl.handle.net/11536/22155
ISSN: 1057-7149
DOI: 10.1109/TIP.2013.2259841
期刊: IEEE TRANSACTIONS ON IMAGE PROCESSING
Volume: 22
Issue: 8
起始頁: 3158
結束頁: 3167
顯示於類別:期刊論文


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