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dc.contributor.authorKang, Tsung-Kueien_US
dc.contributor.authorLiu, Han-Wenen_US
dc.contributor.authorWang, Fang-Hsingen_US
dc.contributor.authorLin, Cheng-Lien_US
dc.contributor.authorLiao, Ta-Chuanen_US
dc.contributor.authorWu, Wen-Faen_US
dc.date.accessioned2014-12-08T15:31:15Z-
dc.date.available2014-12-08T15:31:15Z-
dc.date.issued2011-07-01en_US
dc.identifier.issn0038-1101en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.sse.2011.02.003en_US
dc.identifier.urihttp://hdl.handle.net/11536/22253-
dc.description.abstractStacked HfAlO-SiO(2) tunnel layers are designed for Pd nanocrystal nonvolatile memories. For the sample with 1.5 nm-HfAlO/3.5 nm-SiO(2) tunnel layer, a smaller initial memory window is obtained compared to the sample with 3.5 nm-HfAlO/1.5 nm-SiO(2) tunnel layer. Owing to the thermally induced traps in HfAlO-SiO(2) films are located at a farther distance from the Si substrate and more effective blocking of charge leakage by asymmetric tunnel barrier, a larger final memory window and better retention characteristic can be obtained for Al/blocking oxide SiO(2)/Pd NC5/1.5 nm-HfAlO/3.5 nm-SiO(2)/Si structure. A N(2) plasma treatment can further improve the memory characteristics. Better memory characteristics can be obtained for Pd-nanocrystal-based nonvolatile memory with an adequate thickness ratio of HfAlO to SiO(2). (C) 2011 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleImproved characteristics for Pd nanocrystal memory with stacked HfAlO-SiO(2) tunnel layeren_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.sse.2011.02.003en_US
dc.identifier.journalSOLID-STATE ELECTRONICSen_US
dc.citation.volume61en_US
dc.citation.issue1en_US
dc.citation.spage100en_US
dc.citation.epage105en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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