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dc.contributor.authorYEN, AJen_US
dc.contributor.authorLEE, YSen_US
dc.contributor.authorTSENG, TYen_US
dc.date.accessioned2014-12-08T15:03:42Z-
dc.date.available2014-12-08T15:03:42Z-
dc.date.issued1994-11-01en_US
dc.identifier.issn0002-7820en_US
dc.identifier.urihttp://hdl.handle.net/11536/2249-
dc.description.abstractMultilayer-chip varistors mere prepared using the ZnO-glass system by applying tape casting technology. The effect of processing conditions on the multilayer ceramic microstructure and electrical properties mas studied. The location, size, and density of the pores within the multilayer structure were examined by scanning electron microscopy and the displacement method using distilled mater. The experimental results showed that the electrical properties of a multilayer-chip varistor could be influenced substantially by the porosities associated with environmental moisture in the range approximate to 15%-95% relative humidity at 25 degrees C. Such an effect can cause substantial current leakage as well as the separation of the I-V curves into four regions, i.e., prebreakdown, linear, breakdown, and upturn. A proposed pore model and equivalent circuit for the multilayer-chip ZnO varistors have been simulated with a commercial varistor and a serial resistance to demonstrate the observed I-V phenomena.en_US
dc.language.isoen_USen_US
dc.titleELECTRICAL-PROPERTIES OF MULTILAYER-CHIP ZNO VARISTORS IN A MOIST-AIR ENVIRONMENTen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF THE AMERICAN CERAMIC SOCIETYen_US
dc.citation.volume77en_US
dc.citation.issue11en_US
dc.citation.spage3006en_US
dc.citation.epage3011en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1994PQ99200031-
dc.citation.woscount20-
Appears in Collections:Articles