標題: | Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application |
作者: | Chen, Chia-Min Tsai, Tung-Wei Hung, Chung-Chih 傳播研究所 Institute of Communication Studies |
關鍵字: | Capacitive coupling;hybrid dynamic biasing;low-dropout regulator;transient response;voltage spike |
公開日期: | 1-九月-2013 |
摘要: | This brief presents a low-dropout (LDO) voltage regulator without output capacitors that achieves fast transient responses by hybrid dynamic biasing. The hybrid dynamic biasing in the proposed transient improvement circuit is activated through capacitive coupling. The proposed circuit senses the LDO regulator output change so as to increase the bias current instantly. The proposed circuit was applied to an LDO regulator without output capacitors implemented in standard 0.35-mu m CMOS technology. The device consumes only 25 mu A of quiescent current with a dropout voltage of 180 mV. The proposed circuit reduces the output voltage spike of the LDO regulator to 80 mV when the output current is changed from 0 to 100 mA. The output voltage spike is reduced to 20 mV when the supply voltage varies between 1.3 and 2.3 V with a load current of 100 mA. |
URI: | http://dx.doi.org/10.1109/TVLSI.2012.2217766 http://hdl.handle.net/11536/22537 |
ISSN: | 1063-8210 |
DOI: | 10.1109/TVLSI.2012.2217766 |
期刊: | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Volume: | 21 |
Issue: | 9 |
起始頁: | 1742 |
結束頁: | 1747 |
顯示於類別: | 期刊論文 |