標題: | Background Calibration of Integrator Leakage in Discrete-Time Delta-Sigma Modulators |
作者: | Wu, Su-Hao Wu, Jieh-Tsorng 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2013 |
摘要: | This work develops an integrator-leakage calibration technique for the switched-capacitor integrators in a delta-sigma modulator (DSM). Integrators that are realized with low-gain opamps are lossy. A DSM that uses lossy integrators exhibits a degraded signal-to-quantization-noise ratio. In the calibration of an integrator, its integration leakage is determined in the digital domain, and the leakage compensation is applied to the same integrator in the analog domain. The proposed scheme can be used to calibrate all of the integrators in a discrete-time DSM of any form. It can be performed in the background without interrupting the normal operation of the DSM. |
URI: | http://hdl.handle.net/11536/23067 |
ISBN: | 978-1-4799-0620-8 |
期刊: | 2013 IEEE 11TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS) |
顯示於類別: | 會議論文 |