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dc.contributor.authorWang, Pei-Yuen_US
dc.contributor.authorTsui, Bing-Yueen_US
dc.date.accessioned2014-12-08T15:33:25Z-
dc.date.available2014-12-08T15:33:25Z-
dc.date.issued2013-12-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2013.2287633en_US
dc.identifier.urihttp://hdl.handle.net/11536/23220-
dc.description.abstractThe tunnel field-effect transistor (FET) is a promising candidate for use in ultralow-power applications because of its distinct operation principle, namely, band to band tunneling (BTBT). However, the ON-state current of the tunnel device is extremely low because of the poor tunneling efficiency of the BTBT. In this paper, a novel epitaxial tunnel layer (ETL) structure combining vertical tunneling orientation was proposed. The ETL structure performs more favorably than does the traditional lateral tunnel FET structure in an all-silicon device. By using low bandgap materials in the ETL, the ON-state BTBT current increases and an extremely low intrinsic OFF-state current is maintained because of the small low bandgap junction area. The onset voltage of the bipolar BTBT can also be postponed using ETL band engineering. The optimized parameters of the SixGe1-x ETL tunnel FET structure increase the ON-state current 10(7)-10(8) times compared with that of the traditional lateral silicon tunnel FET. The minimal subthreshold swing (SS) and ON/OFF current ratio also improve, the SS decreases from 47 mV/decade to 29 mV/decade, and the ON/OFF current ratio increase from 10(5) to 10(10). In this paper, the effects of the ETL parameters on device performance are discussed in detail.en_US
dc.language.isoen_USen_US
dc.subjectBand to band tunnelingen_US
dc.subjectepitaxial tunnel layer (ETL)en_US
dc.subjectsilicon-germanium (Si-x Ge1-x)en_US
dc.subjectsubthreshold swing (SS)en_US
dc.subjecttunnel field-effect transistoren_US
dc.subjectvertical tunnelingen_US
dc.titleSixGe1-x Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvementen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2013.2287633en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume60en_US
dc.citation.issue12en_US
dc.citation.spage4098en_US
dc.citation.epage4104en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000327584400019-
dc.citation.woscount2-
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